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 PD - 94364E
HEXFET(R)
l
IRF6603
Power MOSFET
Application Specific MOSFETs l Ideal for CPU Core DC-DC Converters l Low Conduction Losses l High Cdv/dt Immunity l Low Profile (<0.7 mm) l Dual Sided Cooling Compatible l Compatible with existing Surface Mount Techniques
VDSS
30V
RDS(on) max
3.4m@VGS = 10V 5.5m@VGS = 4.5V
Qg(typ.)
48nC
MT
MX MT
DirectFET ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.9,10 for details) SQ SX ST MQ
Description
The IRF6603 combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and process. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, IMPROVING previous best thermal resistance by 80%. The IRF6603 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6603 has been optimized for parameters that are critical in synchronous buck converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6603 offers particularly low Rds(on) and high Cdv/ dt immunity for synchronous FET applications.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TC = 25C ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C PD @TA = 70C PD @TC = 25C TJ TSTG Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current
Max.
30 +20/-12 92 27 22 200 3.6 2.3 42 0.029 -40 to + 150
Units
V
A
g Power Dissipation g
Power Dissipation Power Dissipation
c
W W/C C
Linear Derating Factor Operating Junction and Storage Temperature Range
Thermal Resistance
RJA RJA RJA RJC RJ-PCB
fj Junction-to-Ambient gj Junction-to-Ambient hj Junction-to-Case ij
Junction-to-Ambient
Parameter
Typ.
--- 12.5 20 --- 1.0
Max.
35 --- --- 3.0 ---
Units
C/W
Junction-to-PCB Mounted
Notes through are on page 11
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1
4/8/04
IRF6603
Static @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current
Min. Typ. Max. Units
30 --- --- --- 1.4 --- --- --- --- --- 28 2.4 3.9 --- -6.3 --- --- --- --- --- --- 48 15.6 5.2 16.1 11.1 21.3 28 1.0 20 9.9 24 71 6590 1250 520 --- --- 3.4 5.5 2.5 --- 30 50 100 100 -100 --- 72 --- --- --- --- --- --- 2.0 --- --- --- --- --- --- --- pF VGS = 0V VDS = 15V ns nC nC VDS = 15V VGS = 4.5V ID = 20A S nA V mV/C A A V
Conditions
VGS = 0V, ID = 250A
mV/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 25A VGS = 4.5V, ID = 20A
e e
VDS = VGS, ID = 250A VDS = 24V, VGS = 0V VDS = 30V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 70C VGS = 20V VGS = -12V VDS = 15V, ID = 20A
IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss
Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
--- --- 56 --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
See Fig. 16 VDS = 16V, VGS = 0V VDD = 15V, VGS = 4.5VAe ID = 20A Clamped Inductive Load
= 1.0MHz
Avalanche Characteristics
EAS IAR EAR Parameter Single Pulse Avalanche Energyd Avalanche CurrentA Repetitive Avalanche Energy Typ. --- --- --- Max. 49 20 4.1 Units mJ A mJ
--- --- --- --- --- --- --- 1.0 45 60
Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
Min. Typ. Max. Units
25 A 200 1.3 68 90 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G S D
p-n junction diode. TJ = 25C, IS = 20A, VGS = 0V TJ = 25C, IF = 20A di/dt = 100A/s
e
e
2
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IRF6603
10000
VGS 10V 5.0V 4.5V 4.0V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP
1000
100
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
1000
100
VGS 10V 5.0V 4.5V 4.0V 3.5V 3.3V 3.0V BOTTOM 2.7V TOP
10
1
10
0.1
2.7V 20s PULSE WIDTH Tj = 25C
2.7V 20s PULSE WIDTH Tj = 150C
1
0.01 0.1 1 10 100
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.00
2.0
I D = 25A
ID, Drain-to-Source Current ()
RDS(on) , Drain-to-Source On Resistance
100.00
T J = 150C
1.5
10.00
(Normalized)
1.0
1.00
T J = 25C VDS = 15V 20s PULSE WIDTH
2.0 3.0 4.0 5.0 6.0
0.5
0.10
V GS = 10V
0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature
( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
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IRF6603
100000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
6.0 ID= 20A
VGS, Gate-to-Source Voltage (V)
5.0
VDS= 15V
C, Capacitance(pF)
10000
4.0
Ciss Coss
1000
3.0
Crss
2.0
1.0
100 1 10 100
0.0 0 10 20 30 40 50
VDS, Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100
ID, Drain-to-Source Current (A)
100
I SD , Reverse Drain Current (A)
10
TJ = 150 C
10
100sec 1msec
1
T J = 25 C
1 Tc = 25C Tj = 150C Single Pulse 0 1 10
10msec
V GS = 0 V
0.1 0.2 0.5 0.7 1.0 1.2 1.5
0.1
V SD,Source-to-Drain Voltage (V)
100
1000
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF6603
100
2.5
80
ID, Drain Current (A)
VGS(th) Gate threshold Voltage (V)
90
2.0
70 60 50 40 30 20 10 0 25 50 75 100 125 150 T C , Case Temperature (C)
ID = 250A
1.5
1.0
0.5 -75 -50 -25 0 25 50 75 100 125 150
T J , Temperature ( C )
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Threshold Voltage Vs. Temperature
100
(Z thJA )
D = 0.50 10 0.20 0.10 0.05
Thermal Response
1
0.02 0.01 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = 2. Peak T t1/ t 2 +TA 10 100
0.1
J = P DM x Z thJA
0.01 0.00001
0.0001
0.001
0.01
0.1
1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
IRF6603
120
15V
TOP
100
EAS , Single Pulse Avalanche Energy (mJ)
VDS
L
DRIVER
BOTTOM
ID 8.9A 16A 20A
80
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
60
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
40
20
0 25 50 75 100 125 150
Starting Tj, Junction Temperature
( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
LD VDS
Fig 12b. Unclamped Inductive Waveforms
+
VDD D.U.T
Current Regulator Same Type as D.U.T.
VGS Pulse Width < 1s Duty Factor < 0.1%
50K 12V .2F .3F
Fig 14a. Switching Time Test Circuit
D.U.T. + V - DS
VDS
90%
VGS
3mA
10%
IG ID
VGS
td(on) tr td(off) tf
Current Sampling Resistors
Fig 13. Gate Charge Test Circuit
Fig 14b. Switching Time Waveforms
6
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IRF6603
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
Id Vds Vgs
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 16. Gate Charge Waveform
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IRF6603
Power MOSFET Selection for Non-Isolated DC/DC Converters
Control FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. Power losses in the control switch Q1 are given by; Synchronous FET The power loss equation for Q2 is approximated by;
* P =P loss conduction + P drive + P output
P = Irms x Rds(on) loss
+ (Qg x Vg x f )
(
2
)
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
This can be expanded and approximated by;
Q + oss x Vin x f + (Qrr x Vin x f ) 2
*dissipated primarily in Q1. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs' susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on.
Ploss = (Irms x Rds(on ) )
2
Qgs 2 Qgd +I x x Vin x f + I x x Vin x f ig ig + (Qg x Vg x f ) + Qoss x Vin x f 2
This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Qgs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitances Cds and Cdg when multiplied by the power supply input buss voltage.
Figure A: Qoss Characteristic
8
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IRF6603
DirectFET Outline Dimension, MT Outline (Medium Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC MAX CODE MIN 6.35 A 6.25 5.05 B 4.80 3.95 C 3.85 0.45 D 0.35 0.82 E 0.78 0.92 F 0.88 1.82 G 1.78 H 0.98 1.02 0.67 J 0.63 K O.88 1.01 2.63 L 2.46 0.70 M 0.59 0.08 N 0.03 0.17 P 0.08 IMPERIAL MIN MAX 0.246 0.250 0.189 0.199 0.152 0.156 0.014 0.018 0.031 0.032 0.035 0.036 0.070 0.072 0.039 0.040 0.025 0.026 0.035 0.039 0.097 0.104 0.023 0.028 0.001 0.003 0.003 0.007
NOTE: CONTROLLING DIMENSIONS ARE IN MM
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9
IRF6603
DirectFET Substrate and PCB Layout, MT Outline (MediumSize Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
1- Drain 2- Drain 3- Source 4- Source 5- Gate 6- Drain 7- Drain
6 5 7
3 4
1
2
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6603). For 1000 parts on 7" reel, order IRF6603TR1 REEL DIMENSIONS TR1 OPTION (QTY 1000) STANDARD OPTION (QTY 4800) METRIC METRIC IMPERIAL IMPERIAL MIN MIN MAX CODE MIN MAX MIN MAX MAX 12.992 A 6.9 N.C 177.77 N.C N.C 330.0 N.C 0.795 B 0.75 N.C 19.06 N.C 20.2 N.C N.C 0.504 C 0.53 0.50 13.5 12.8 0.520 12.8 13.2 0.059 D 0.059 N.C 1.5 N.C 1.5 N.C N.C 3.937 E 2.31 58.72 100.0 N.C N.C N.C N.C F N.C N.C 0.53 N.C N.C 0.724 13.50 18.4 G 0.488 0.47 11.9 12.4 N.C 0.567 12.01 14.4 H 0.469 0.47 11.9 11.9 0.606 N.C 12.01 15.4
10
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IRF6603
DirectFET Part Marking
6603
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. Starting TJ = 25C, L = 0.24mH RG = 25, IAS = 20A. Pulse width 400s; duty cycle 2%.
Surface mounted on 1 in. square Cu board. Used double sided cooling , mounting pad. Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
TC measured with thermal couple mounted to top (Drain) of
part.
R is measured at TJ of approximately 90C.
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.4/04
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